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https://dspace.ctu.edu.vn/jspui/handle/123456789/127157Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Bui, Long Vinh | - |
| dc.contributor.author | Nguyen, Ngoc Toan | - |
| dc.contributor.author | Dao, Minh Tuan | - |
| dc.contributor.author | Do, Hoang Nam | - |
| dc.contributor.author | Phan, Quoc Hien | - |
| dc.contributor.author | Phan, Dang Hoang | - |
| dc.date.accessioned | 2026-04-29T02:33:38Z | - |
| dc.date.available | 2026-04-29T02:33:38Z | - |
| dc.date.issued | 2025 | - |
| dc.identifier.issn | 2615-9910 | - |
| dc.identifier.uri | https://dspace.ctu.edu.vn/jspui/handle/123456789/127157 | - |
| dc.description.abstract | The highly accurate, high-speed acquisition of cutting force data is a fundamental prerequisite for the real-time monitoring and optimization of machining processes. To date, the predominant focus of research has been on the mechanical design and calibration accuracy of dynamometers, with comparatively limited attention devoted to the optimization of embedded data acquisition architectures. This study addresses this gap by presenting a systematic performance comparison of four distinct data acquisition strategies implemented on a three-axis real-time force measurement system in turning process. The architectures: (i) Polling, (ii) Polling with Interrupts, (iii) a Real-Time Operating System (RTOS) with Interrupts, and (iv) an RTOS with Direct Memory Access (DMA) utilizing a double buffering mechanism were evaluated on an STM32 microcontroller platform integrated with a 24-bit ADC operating at 32 kSPS. Performance was quantitatively assessed based on CPU utilization and sampling rate stability. The empirical results demonstrate that while conventional Polling and Interrupt-driven methods achieve the target sampling rate, they do so at the cost of nearly 100% CPU utilization. The RTOS-Interrupt architecture offered a substantial improvement, reducing the CPU load to approximately 97.51%. Most significantly, the RTOS-DMA configuration demonstrated superior efficacy, achieving an average CPU load time of 87.23% while maintaining high sampling rate stability (33,145.09±36.64 samples/s). These findings validate that the RTOS-DMA architecture provides an optimal balance between high data throughput and computational efficiency. This approach effectively decouples data acquisition from the CPU, thereby enabling parallel execution of critical tasks such as signal processing and communication, establishing it as the most suitable architecture for robust, multi-tasking smart machining monitoring systems. | vi_VN |
| dc.language.iso | vi | vi_VN |
| dc.relation.ispartofseries | Tạp chí Cơ khí Việt Nam;Số 337+338 .- Tr.344-352 | - |
| dc.subject | Embedded system | vi_VN |
| dc.subject | Dynamometer | vi_VN |
| dc.subject | Turning process | vi_VN |
| dc.subject | Real-time operating system | vi_VN |
| dc.subject | Direct memory access embedded architecture | vi_VN |
| dc.subject | Real-time force measurement | vi_VN |
| dc.title | Optimizing realtime performance for embedded system in 3 axis dyanometer: A comparision between techniques = Tối ưu hóa hiệu năng thời gian thực cho hệ thống nhúng trong thiết bị đo lực ba thành phần: So sánh giữa các kỹ thuật | vi_VN |
| dc.type | Article | vi_VN |
| Appears in Collections: | Cơ khí Việt Nam | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| _file_ Restricted Access | 900.46 kB | Adobe PDF | ||
| Your IP: 216.73.216.249 |
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