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dc.contributor.authorLê, Quốc Anh-
dc.contributor.authorLee, Dong-Choon-
dc.date.accessioned2018-11-21T08:11:16Z-
dc.date.available2018-11-21T08:11:16Z-
dc.date.issued2017-
dc.identifier.urihttp://localhost:8080//jspui/handle/123456789/5151-
dc.description.abstractIn this paper, a novel space-vector pulse-width modulation (PWM) scheme for reducing the common-mode voltage (CMV) in the three-phase five-level active neutral-point clamped (5L-ANPC) inverter is proposed, where only the 55 selected voltage vectors among the entire 125 that produce low values of the CMV are utilized. This PWM scheme can significantly reduce the CMV without the increase of switching losses and total harmonic distortion of the output voltages. With the 55 selected voltage vectors, the inverter can still operate up to the maximum modulation index. In addition, the capacitor voltages are controlled by redundant switches of the 5L-ANPC inverters. It has been shown that the peak value of the CMV is decreased to one-twelfth of the dc-link voltage from the simulation and experimental results.vi_VN
dc.language.isoenvi_VN
dc.relation.ispartofseriesIEEE Transactions on Industry Applications;53 .- p.1-11-
dc.subjectActive neutral point clamped invertervi_VN
dc.subjectCommon-mode voltagevi_VN
dc.subjectMultilevel invertervi_VN
dc.subjectSpace vector pulse width modulationvi_VN
dc.titleReduction of common-mode voltages for five-level active NPC inverters by the space-vector modulation techniquevi_VN
dc.typeArticlevi_VN
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